mirror of
https://github.com/cnlohr/lolra.git
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cnlohr
442 lines
12 KiB
C
442 lines
12 KiB
C
/**
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MIT-like-non-ai-license
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Copyright (c) 2024 Charles Lohr "CNLohr"
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the two following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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In addition the following restrictions apply:
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1. The Software and any modifications made to it may not be used for the
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purpose of training or improving machine learning algorithms, including but not
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limited to artificial intelligence, natural language processing, or data
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mining. This condition applies to any derivatives, modifications, or updates
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based on the Software code. Any usage of the Software in an AI-training dataset
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is considered a breach of this License.
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2. The Software may not be included in any dataset used for training or
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improving machine learning algorithms, including but not limited to artificial
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intelligence, natural language processing, or data mining.
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3. Any person or organization found to be in violation of these restrictions
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will be subject to legal action and may be held liable for any damages
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resulting from such use.
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If any term is unenforcable, other terms remain in-force.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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**/
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#include "ch32v003fun.h"
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#include <stdio.h>
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#include <string.h>
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#include "chirpbuff.h"
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#include "chirpbuffinfo.h"
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#include "../../lib/LoRa-SDR-Code.h"
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// NOTE: The SPI engine in the 203 isn't perfect, and I wasn't able to get the I2S engine working.
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// Optionally send LoRaWAN messages. Be sure to copy your keys from the things network.
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#define LORAWAN
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#ifdef LORAWAN
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#include "lorawan_simple.h"
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static const uint8_t payload_key[AES_BLOCKLEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; // AppSKey Big Endian
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static const uint8_t network_skey[AES_BLOCKLEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; // NwkSKey Big Endian
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static const uint8_t devaddress[4] = { 0x00, 0x00, 0x00, 0x00 }; // Device address Little Endian LSB (Written backwards from Device address default view)
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#endif
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#define SENDBUFF_WORDS (DMA_SIZE_WORDS*2)
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uint16_t sendbuff[SENDBUFF_WORDS];
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#if !defined( FOUND_PERFECT_DIVISOR )
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#error Code only written for perfect division right now.
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#endif
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// Bits are shifted out MSBit first, then to LSBit
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#define MAX_BYTES 60
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#define MAX_SYMBOLS (MAX_BYTES*2+16)
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// Our table is bespoke for the specific SF.
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#define CHIPSSPREAD CHIRPLENGTH_WORDS// QUARTER_CHIRP_LENGTH_WORDS (TODO: Use the quater value elsewhere in the code)
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#define MARK_FROM_SF0 (1<<SF_NUMBER) // SF7
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#define PREAMBLE_CHIRPS 10
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#define CODEWORD_LENGTH 2
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uint32_t quadsetcount;
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int16_t quadsets[MAX_SYMBOLS*4+PREAMBLE_CHIRPS*4+9+CODEWORD_LENGTH*4];
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int runningcount_bits = 0;
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volatile int fxcycle;
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volatile int quadsetplace = -1;
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int16_t * AddChirp( int16_t * qso, int offset, int verneer )
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{
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offset = offset * CHIPSSPREAD / (MARK_FROM_SF0);
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offset += verneer;
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*(qso++) = (CHIPSSPREAD * 0 / 4 + offset + CHIPSSPREAD ) % CHIPSSPREAD;
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*(qso++) = (CHIPSSPREAD * 1 / 4 + offset + CHIPSSPREAD ) % CHIPSSPREAD;
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*(qso++) = (CHIPSSPREAD * 2 / 4 + offset + CHIPSSPREAD ) % CHIPSSPREAD;
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*(qso++) = (CHIPSSPREAD * 3 / 4 + offset + CHIPSSPREAD ) % CHIPSSPREAD;
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return qso;
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}
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// This IRQ is called peridocally to fill the buffer that is going to the DMA.
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void DMA1_Channel5_IRQHandler( void ) __attribute__((interrupt)) __attribute__((section(".srodata")));
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void DMA1_Channel5_IRQHandler( void )
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{
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//GPIOD->BSHR = 1; // Turn on GPIOD0 for profiling
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// Backup flags.
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volatile int intfr = DMA1->INTFR;
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do
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{
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// Clear all possible flags.
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DMA1->INTFCR = DMA1_IT_GL5;
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int place = DMA1_Channel5->CNTR;
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// CNTR says that there are THIS MANY bytes left in the transfer.
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// So a high CNTR value indicates a very early place in the buffer.
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uint16_t * sb = 0;
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//if( intfr & DMA1_IT_HT5 )
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if( place < SENDBUFF_WORDS/2 )
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{
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sb = sendbuff + SENDBUFF_WORDS/2;
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}
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//else if( intfr & DMA1_IT_TC5 )
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else
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{
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sb = sendbuff;
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}
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if( sb )
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{
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if( quadsetplace < 0 )
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{
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// Abort Send
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memset( sb, 0, SENDBUFF_WORDS*2/2 ); //in bytes, but only half the buffer.
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DMA1_Channel5->CFGR &= ~DMA_Mode_Circular; // disable transfer.
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goto complete;
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}
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if( 0 ) // Generate test tone
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{
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int remain = SENDBUFF_WORDS/2;
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do
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{
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uint16_t v = chirpbuff[quadsetplace++];
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if( quadsetplace >= QUARTER_CHIRP_LENGTH_WORDS*4 ) quadsetplace = 0;
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*(sb++) = v;
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} while( --remain );
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}
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else
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{
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fxcycle += DMA_SIZE_WORDS;
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if( fxcycle == NUM_DMAS_PER_QUARTER_CHIRP*DMA_SIZE_WORDS )
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{
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fxcycle = 0;
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// Advance to next quarter word.
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quadsetplace++;
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if( quadsetplace > quadsetcount )
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{
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quadsetplace = -1;
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memset( sb, 0, SENDBUFF_WORDS*2/2 );
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goto complete;
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}
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}
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int symbol = quadsets[quadsetplace]; // Actually 0...CHIRPLENGTHWORDS
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const uint16_t * tsb = 0;
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// Select down- or up-chirp.
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if( symbol < 0 )
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{
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int word = fxcycle - symbol - 1;
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if( word >= CHIRPLENGTH_WORDS ) word -= CHIRPLENGTH_WORDS;
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word++;
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tsb = (&chirpbuff[word+REVERSE_START_OFFSET_BYTES/2]);
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}
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else
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{
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int word = fxcycle + symbol;
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if( word >= CHIRPLENGTH_WORDS ) word -= CHIRPLENGTH_WORDS;
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tsb = (&chirpbuff[word]);
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}
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int cpy = DMA_SIZE_WORDS;
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// Very fast half-word-copy.
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// Make sure the data is aligned to groups-of-two bytes.
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if( cpy & 1 )
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{
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*(sb++) = *(tsb++);
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cpy--;
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}
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cpy /= 2; // Doubled up per loop
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asm volatile("\
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1:\
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lh a3, 0(%[from])\n\
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lh a4, 2(%[from])\n\
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c.addi %[from], 4\n\
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c.addi %[cpy], -1\n\
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sh a3, 0(%[to])\n\
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sh a4, 2(%[to])\n\
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c.addi %[to], 4\n\
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c.bnez %[cpy], 1b\n\
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" : [cpy]"+r"(cpy), [from]"+r"(tsb), [to]"+r"(sb) : : "a3", "a4", "memory");
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// while( cpy-- ) { *(sb++) = *(tsb++); } // Doesn't help. GCC Still tries to use memcpy.
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//memcpy( sb, tsb, DMA_SIZE_WORDS * 2 );
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}
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}
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complete:
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intfr = DMA1->INTFR;
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} while( intfr );
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//GPIOD->BSHR = 1<<16; // Turn off GPIOD0 for profiling
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}
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int main()
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{
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SystemInit();
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funGpioInitAll();
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// Force HCLK to be nodiv. ch32vfun sets it to be a reasonbly high div.
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RCC->CFGR0 &= ~RCC_PPRE1_DIV16;
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// MCO for testing.
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// funPinMode( PA8, GPIO_CFGLR_OUT_50Mhz_AF_PP ); RCC->CFGR0 |= RCC_CFGR0_MCO_PLL;
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printf( "Switching to HSE\n" );
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Delay_Ms( 100 );
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// Disable clock security system.
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RCC->CTLR &= ~RCC_CSSON;
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#ifdef USE_EXTERNAL_CLOCK
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// No crystal - use clock.
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RCC->CTLR |= RCC_HSEBYP;
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#endif
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// Enable external crystal
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RCC->CTLR |= RCC_HSEON;
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// Set System Clock Source to be 0.
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RCC->CFGR0 = (RCC->CFGR0 & ~RCC_SW) | 0;
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// Disable PLL
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RCC->CTLR &= ~RCC_PLLON;
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#ifdef USE_EXTERNAL_CLOCK
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// Set PLL to 9x not 18x
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RCC->CFGR0 = ( RCC->CFGR0 & ~RCC_PLLMULL18 ) | RCC_PLLMULL9;
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#endif
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// Switch to HSE
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RCC->CFGR0 |= RCC_PLLSRC;
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// Enable PLL
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RCC->CTLR |= RCC_PLLON;
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// Wait for HSE to become ready.
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while( !( RCC->CTLR & RCC_HSERDY) );
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while( !( RCC->CTLR & RCC_PLLRDY) );
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RCC->CFGR0 |= RCC_SW_1; // Switch system clock to PLL
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printf( "HSE Switched\n" );
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Delay_Ms( 10 );
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RCC->CTLR &= ~RCC_HSION;
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Delay_Ms( 10 );
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printf( "HSI Off [%08lx %08lx]\n", RCC->CTLR, RCC->CFGR0 );
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// funPinMode( PB12, GPIO_CFGLR_OUT_50Mhz_AF_PP ); // NSS
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// funPinMode( PB13, GPIO_CFGLR_OUT_50Mhz_AF_PP ); // SCK
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// funPinMode( PB14, GPIO_CFGLR_OUT_50Mhz_AF_PP ); // MISO
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funPinMode( PB15, GPIO_CFGLR_OUT_50Mhz_AF_PP ); // MOSI
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RCC->APB1PRSTR = RCC_SPI2RST;
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RCC->APB1PRSTR = 0;
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RCC->APB1PCENR |= RCC_APB1Periph_SPI2;
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RCC->AHBPCENR |= RCC_AHBPeriph_DMA1;
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// Configure SPI
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SPI2->CTLR1 =
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SPI_NSS_Soft | SPI_CPHA_1Edge | SPI_CPOL_Low | SPI_DataSize_16b |
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SPI_Mode_Master | SPI_Direction_1Line_Tx |
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0 |
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0<<3; // Divisior = 0
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// If using DMA may need this.
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SPI2->CTLR2 = SPI_CTLR2_TXDMAEN;
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SPI2->HSCR = 1; // High-speed enable.
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SPI2->CTLR1 |= CTLR1_SPE_Set;
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//SPI2->DATAR = 0x55aa; // Set SPI line Low.
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//DMA1_Channel5 is for SPI2TX
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DMA1_Channel5->PADDR = (uint32_t)&SPI2->DATAR;
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DMA1_Channel5->MADDR = (uint32_t)sendbuff;
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DMA1_Channel5->CNTR = 0;// sizeof( bufferset )/2; // Number of unique copies. (Don't start, yet!)
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DMA1_Channel5->CFGR =
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DMA_M2M_Disable |
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DMA_Priority_VeryHigh |
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DMA_MemoryDataSize_HalfWord |
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DMA_PeripheralDataSize_HalfWord |
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DMA_MemoryInc_Enable |
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DMA_Mode_Normal | // OR DMA_Mode_Circular or DMA_Mode_Normal
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DMA_DIR_PeripheralDST |
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DMA_IT_TC | DMA_IT_HT; // Transmission Complete + Half Empty Interrupts.
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NVIC_EnableIRQ( DMA1_Channel5_IRQn );
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DMA1_Channel5->CFGR |= DMA_CFGR1_EN;
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memset( sendbuff, 0x00, sizeof( sendbuff ) );
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// Enter critical section.
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DMA1_Channel5->CNTR = 0;
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DMA1_Channel5->MADDR = (uint32_t)sendbuff;
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DMA1_Channel5->CNTR = SENDBUFF_WORDS; // Number of unique uint16_t entries.
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DMA1_Channel5->CFGR |= DMA_Mode_Circular;
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uint16_t lora_symbols[MAX_SYMBOLS];
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int lora_symbols_count;
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while(1)
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{
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Delay_Ms( 1000 );
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#ifdef LORAWAN
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Delay_Ms( 1000 );
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static uint32_t frame = 0;
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// Send a message with LoraWan. Formatted specifically for thethings.network.
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uint8_t inner_payload_raw[24];
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int inner_payload_len = snprintf( (char*)inner_payload_raw, 24, "meow%lu ", frame%10 );
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inner_payload_len = 5;
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// Just some random data.
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uint8_t raw_payload_with_b0[259+8] = { };
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uint8_t * payload_in = raw_payload_with_b0 + 16;
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uint8_t * pl = payload_in;
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int payload_in_size = 0;
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pl += GenerateLoRaWANPacket( raw_payload_with_b0, inner_payload_raw, inner_payload_len, payload_key, network_skey, devaddress, frame++);
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payload_in_size = pl - payload_in;
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lora_symbols_count = 0;
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#else
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// Just some random data.
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uint8_t payload_in[MAX_BYTES] = { 0xbb, 0xcc, 0xde, 0x55, 0x22,};
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int payload_in_size = 6;
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static int msgno = 0;
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payload_in[4] = msgno++;
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#endif
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lora_symbols_count = 0;
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int r = CreateMessageFromPayload( lora_symbols, &lora_symbols_count, MAX_SYMBOLS, SF_NUMBER, 4, payload_in, payload_in_size );
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if( r < 0 )
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{
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printf( "Failed to generate message (%d)\n", r );
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// Failed
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continue;
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}
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int j;
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quadsetcount = 0;
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int16_t * qso = quadsets;
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for( j = 0; j < PREAMBLE_CHIRPS; j++ )
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{
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qso = AddChirp( qso, 0, 0 );
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}
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uint8_t syncword = 0x43;
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#define CODEWORD_SHIFT 3
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if( CODEWORD_LENGTH > 0 )
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qso = AddChirp( qso, ( ( syncword & 0xf ) << CODEWORD_SHIFT ), 0 );
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if( CODEWORD_LENGTH > 1 )
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qso = AddChirp( qso, ( ( ( syncword & 0xf0 ) >> 4 ) << CODEWORD_SHIFT ), 0);
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*(qso++) = -(CHIPSSPREAD * 0 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 1 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 2 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 3 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 0 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 1 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 2 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 3 / 4 )-1;
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*(qso++) = -(CHIPSSPREAD * 0 / 4 )-1;
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if( SF_NUMBER <= 6 )
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{
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// Two additional upchirps with SF6 https://github.com/tapparelj/gr-lora_sdr/issues/74#issuecomment-1891569580
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for( j = 0; j < 2; j++ )
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qso = AddChirp( qso, 0, 0 );
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}
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for( j = 0; j < lora_symbols_count; j++ )
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{
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int ofs = lora_symbols[j];
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//ofs = ofs ^ ((MARK_FROM_SF6<<6) -1);
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//ofs &= (MARK_FROM_SF6<<6) -1;
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qso = AddChirp( qso, ofs, 0 );
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printf( "%03x ", ofs );
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}
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printf( "\n" );
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runningcount_bits = 0;
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// This tells the interrupt we have data.
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quadsetcount = qso - quadsets + 0;
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printf( "--- %d [%d] %d\n", (int)lora_symbols_count, (int)quadsetcount, CHIPSSPREAD/4 );
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quadsetplace = 0;
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DMA1_Channel5->CFGR |= DMA_Mode_Circular;
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}
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}
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