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cnlohr
295 lines
9.1 KiB
C
295 lines
9.1 KiB
C
/**
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MIT-like-non-ai-license
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Copyright (c) 2024 Charles Lohr "CNLohr"
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the two following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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In addition the following restrictions apply:
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1. The Software and any modifications made to it may not be used for the
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purpose of training or improving machine learning algorithms, including but not
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limited to artificial intelligence, natural language processing, or data
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mining. This condition applies to any derivatives, modifications, or updates
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based on the Software code. Any usage of the Software in an AI-training dataset
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is considered a breach of this License.
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2. The Software may not be included in any dataset used for training or
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improving machine learning algorithms, including but not limited to artificial
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intelligence, natural language processing, or data mining.
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3. Any person or organization found to be in violation of these restrictions
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will be subject to legal action and may be held liable for any damages
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resulting from such use.
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If any term is unenforcable, other terms remain in-force.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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**/
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#include "esp8266_auxrom.h"
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#include "eagle_soc.h"
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#include "nosdk8266.h"
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#include "esp8266_rom.h"
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#include <string.h>
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#include "ets_sys.h"
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#include "pin_mux_register.h"
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#include "slc_register.h"
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#include "dmastuff.h"
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#include "samples.h"
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//#define CONTINUOUS_TONE
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// The speed at which bits are shifted out - this is done with trial and error. Try one speed
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// and figure out how it aligns to your target system. The units are too messy for me to be
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// troubled with thinking of.
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#define BIT_RATE 245
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#define num_replays (( SAMPLE_RATE / (DMA_WORDS*NUMBITS) ) / BIT_RATE)
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uint8_t output_buffer[] = {
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// OOK, map to time_limits_for_bits, 0 is short pulse, 1 is long pulse, 2 is no-signal.
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// You will need to manually use your 310MHz device and record the pulse timing
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// To fill out this array with thecorrect code for your opener.
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0, 1, 0, 0, 0, 1, 1, 2, 2, 2, 2, 1, 0, 1, 0, 1, 0, 0, 1, 1,
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};
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uint32_t time_limits_for_bits[3] = { num_replays/8, num_replays/2, 0 };
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uint32_t dummy[DMA_WORDS];
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void testi2s_init();
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//These contol the speed at which the bus comms.
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#define DMABUFFERDEPTH 3
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#define WS_I2S_BCK SPI_DIV //Can't be less than 1.
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#define WS_I2S_DIV 1
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#define call_delay_us(time) { asm volatile("mov.n a2, %0\n_call0 delay4clk" : : "r"(time * (MAIN_MHZ / 8)) : "a2" ); }
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//I2S DMA buffer descriptors
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static struct sdio_queue i2sBufDescTX[DMABUFFERDEPTH] __attribute__((aligned(128)));;
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volatile int output_buffer_place = 1000000;
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volatile int count_out_this_bit = 0;
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volatile int etx = 0;
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void slc_isr(void * v) {
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uint32_t * sendbuff = 0;
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struct sdio_queue *finishedDesc;
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// slc_intr_status = READ_PERI_REG(SLC_INT_STATUS); -> We should check to make sure we are SLC_RX_EOF_INT_ST, but we are only getting one interrupt.
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WRITE_PERI_REG(SLC_INT_CLR, 0xffffffff);
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finishedDesc=(struct sdio_queue*)READ_PERI_REG(SLC_RX_EOF_DES_ADDR);
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#ifdef CONTINUOUS_TONE
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return;
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#endif
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etx++;
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if( output_buffer_place >= sizeof( output_buffer ) / sizeof( output_buffer[0] ) )
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{
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goto dump0;
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}
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count_out_this_bit++;
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if( count_out_this_bit >= num_replays )
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{
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count_out_this_bit = 0;
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output_buffer_place++;
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if( output_buffer_place >= sizeof( output_buffer ) / sizeof( output_buffer[0] ) )
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{
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goto dump0;
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}
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}
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int symbol = output_buffer[output_buffer_place];
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if( count_out_this_bit < time_limits_for_bits[symbol] )
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{
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sendbuff = samples;
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}
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else
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{
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sendbuff = dummy;
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}
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finishedDesc->buf_ptr = (uint32_t)sendbuff;
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finishedDesc->datalen = DMA_WORDS*4;
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return;
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dump0:
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finishedDesc->buf_ptr = (uint32_t)dummy;
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finishedDesc->datalen = DMA_WORDS*4;
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return;
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}
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#ifdef TESTSTRAP
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void SPIRead( uint32_t pos, uint32_t * buff, int len )
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{
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memcpy( buff, (pos - 0x00020000) + (uint8_t*)chirpbuff, len );
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}
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void nosdk8266_init()
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{
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}
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void testi2s_init()
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{
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}
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#else
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//Initialize I2S subsystem for DMA circular buffer use
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void testi2s_init() {
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int x, y;
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//Bits are shifted out
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//Initialize DMA buffer descriptors in such a way that they will form a circular
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//buffer.
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for (x=0; x<DMABUFFERDEPTH; x++) {
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i2sBufDescTX[x].owner=1;
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i2sBufDescTX[x].eof=1; // Trigger interrupt on packet complete.
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i2sBufDescTX[x].sub_sof=0;
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i2sBufDescTX[x].datalen=DMA_WORDS*4;
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i2sBufDescTX[x].blocksize=4;
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#ifdef CONTINUOUS_TONE
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i2sBufDescTX[x].buf_ptr= ((uint32_t)samples);
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#else
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i2sBufDescTX[x].buf_ptr= ((uint32_t)dummy);
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#endif
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i2sBufDescTX[x].unused=0;
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i2sBufDescTX[x].next_link_ptr=(int)((x<(DMABUFFERDEPTH-1))?(&i2sBufDescTX[x+1]):(&i2sBufDescTX[0]));
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}
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//Reset DMA )
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//SLC_TX_LOOP_TEST = IF this isn't set, SO will occasionally get unrecoverable errors when you underflow.
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//Originally this little tidbit was found at https://github.com/pvvx/esp8266web/blob/master/info/libs/bios/sip_slc.c
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//
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//I have not tried without SLC_AHBM_RST | SLC_AHBM_FIFO_RST. I just assume they are useful?
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SET_PERI_REG_MASK(SLC_CONF0, SLC_TX_LOOP_TEST |SLC_RXLINK_RST|SLC_TXLINK_RST|SLC_AHBM_RST | SLC_AHBM_FIFO_RST);
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CLEAR_PERI_REG_MASK(SLC_CONF0, SLC_RXLINK_RST|SLC_TXLINK_RST|SLC_AHBM_RST | SLC_AHBM_FIFO_RST);
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//Clear DMA int flags
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SET_PERI_REG_MASK(SLC_INT_CLR, 0xffffffff);
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CLEAR_PERI_REG_MASK(SLC_INT_CLR, 0xffffffff);
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//Enable and configure DMA
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CLEAR_PERI_REG_MASK(SLC_CONF0, (SLC_MODE<<SLC_MODE_S));
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SET_PERI_REG_MASK(SLC_CONF0,(1<<SLC_MODE_S));
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// We have to do this, otherwise, when the end of a "RX" packet is hit, it will skip outputting a few random frames.
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SET_PERI_REG_MASK(SLC_RX_DSCR_CONF,SLC_INFOR_NO_REPLACE|SLC_TOKEN_NO_REPLACE);
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CLEAR_PERI_REG_MASK(SLC_RX_DSCR_CONF, SLC_RX_FILL_EN|SLC_RX_EOF_MODE | SLC_RX_FILL_MODE);
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CLEAR_PERI_REG_MASK(SLC_RX_LINK,SLC_RXLINK_DESCADDR_MASK);
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SET_PERI_REG_MASK(SLC_RX_LINK, ((uint32)&i2sBufDescTX[0]) & SLC_RXLINK_DESCADDR_MASK);
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//Attach the DMA interrupt
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ets_isr_attach(ETS_SLC_INUM, slc_isr, 0);
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WRITE_PERI_REG(SLC_INT_ENA, SLC_RX_EOF_INT_ENA ); // Not including SLC_RX_UDF_INT_ENA
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//clear any interrupt flags that are set
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WRITE_PERI_REG(SLC_INT_CLR, 0xffffffff);
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///enable DMA intr in cpu
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ets_isr_unmask(1<<ETS_SLC_INUM);
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//Start transmission
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SET_PERI_REG_MASK(SLC_RX_LINK, SLC_RXLINK_START);
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//Init pins to i2s functions
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_I2SO_DATA); // GPIO3
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_I2SO_WS); // GPIO2
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_I2SO_BCK); // GPIO15
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//Enable clock to i2s subsystem
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i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 1);
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//Reset I2S subsystem
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CLEAR_PERI_REG_MASK(I2SCONF,I2S_I2S_RESET_MASK);
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SET_PERI_REG_MASK(I2SCONF,I2S_I2S_RESET_MASK);
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CLEAR_PERI_REG_MASK(I2SCONF,I2S_I2S_RESET_MASK);
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CLEAR_PERI_REG_MASK(I2S_FIFO_CONF, I2S_I2S_DSCR_EN|(I2S_I2S_RX_FIFO_MOD<<I2S_I2S_RX_FIFO_MOD_S));
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SET_PERI_REG_MASK(I2S_FIFO_CONF, I2S_I2S_DSCR_EN);
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WRITE_PERI_REG(I2SRXEOF_NUM, DMA_WORDS*4);
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CLEAR_PERI_REG_MASK(I2SCONF_CHAN, (I2S_RX_CHAN_MOD<<I2S_RX_CHAN_MOD_S));
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CLEAR_PERI_REG_MASK(I2SCONF, I2S_TRANS_SLAVE_MOD|I2S_RECE_SLAVE_MOD|
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(I2S_BITS_MOD<<I2S_BITS_MOD_S)|
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(I2S_BCK_DIV_NUM <<I2S_BCK_DIV_NUM_S)|
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(I2S_CLKM_DIV_NUM<<I2S_CLKM_DIV_NUM_S));
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SET_PERI_REG_MASK(I2SCONF, I2S_RIGHT_FIRST|I2S_MSB_RIGHT|
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I2S_RECE_MSB_SHIFT|I2S_TRANS_MSB_SHIFT|
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((WS_I2S_BCK&I2S_BCK_DIV_NUM )<<I2S_BCK_DIV_NUM_S)|
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((WS_I2S_DIV&I2S_CLKM_DIV_NUM)<<I2S_CLKM_DIV_NUM_S) );
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//Start transmission
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SET_PERI_REG_MASK(I2SCONF,I2S_I2S_TX_START|I2S_I2S_RX_START);
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}
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#endif
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int main()
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{
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// We store the bit pattern at flash:0x20000, so we don't have to constantly
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// re-write it when working on code.
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memset( dummy, 0, sizeof( dummy ) );
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int frame = 0;
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output_buffer_place = 1000000;
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count_out_this_bit = 0;
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etx = 0;
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// Don't crank up clock speed til we're done with flash.
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nosdk8266_init();
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testi2s_init();
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#ifdef CONTINUOUS_TONE
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while(1);
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#endif
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while(1) {
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//12x this speed.
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frame++;
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PIN_OUT_SET = _BV(2); //Turn GPIO2 light off.
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//call_delay_us(1000000);
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printf("ETX: %d %d %d %d ( %d / %d ) / %d \n", etx, output_buffer_place, count_out_this_bit, num_replays, SAMPLE_RATE, BIT_RATE, DMA_WORDS );
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PIN_OUT_CLEAR = _BV(2); //Turn GPIO2 light off.
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output_buffer_place = 0;
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count_out_this_bit = 0;
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call_delay_us(5000000);
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}
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}
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