From 298035f8ebe1e10a97e21a072ddee3956327c9b1 Mon Sep 17 00:00:00 2001
From: cnlohr <lohr85@gmail.com>
Date: Wed, 19 Jun 2024 19:42:39 -0700
Subject: [PATCH] Working on 203

---
 ch32v/ch32v003-adcrx/adcrx.c |  2 ++
 ch32v/ch32v003fun            |  2 +-
 ch32v/ch32v203-adcrx/adcrx.c | 17 +++++++++++------
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/ch32v/ch32v003-adcrx/adcrx.c b/ch32v/ch32v003-adcrx/adcrx.c
index 6e870a0..cb61195 100644
--- a/ch32v/ch32v003-adcrx/adcrx.c
+++ b/ch32v/ch32v003-adcrx/adcrx.c
@@ -1,6 +1,8 @@
 // XXX TODO: Play with high bits of ADC control to see if there's a gain cicuit.
 // XXX TODO: Try to see if there is a way to tightly  control Q, right now it's kinda random.
 // XXX TODO: It looks like our loop can exit early - or more specifically we can "wrap around" our data because adc may not be == because it is skipping numbers
+// XXX TODO: Verify it's actually using the HSE.
+
 /**
 
 MIT-like-non-ai-license
diff --git a/ch32v/ch32v003fun b/ch32v/ch32v003fun
index 87e4ee5..4a959f4 160000
--- a/ch32v/ch32v003fun
+++ b/ch32v/ch32v003fun
@@ -1 +1 @@
-Subproject commit 87e4ee59d9f63e1c126c728adcbc68133361e57e
+Subproject commit 4a959f4a77e856089be6b85c0cc27b921119b405
diff --git a/ch32v/ch32v203-adcrx/adcrx.c b/ch32v/ch32v203-adcrx/adcrx.c
index 4613d41..16ef816 100644
--- a/ch32v/ch32v203-adcrx/adcrx.c
+++ b/ch32v/ch32v203-adcrx/adcrx.c
@@ -1,4 +1,3 @@
-//XXX DOES NOT CURRENTLY WORK XXX
 /**
 
 MIT-like-non-ai-license
@@ -67,7 +66,7 @@ SOFTWARE.
 
 #define Q 1024
 
-#define PWM_PERIOD (36-1) //For 26.0MHz??? Or not???  -- It appears to be good for *244 in the table?  WHY 26MHz???!?!!?
+#define PWM_PERIOD (36-1) //For 27.0MHz -- It appears to be good for *244 in the table?  WHY 26MHz???!?!!?
 #define TIGHT_OUT 1
 #define QUADRATURE
 //#define DUMPBUFF
@@ -121,7 +120,8 @@ void SetupADC()
 	while(ADC1->CTLR2 & ADC_CAL);
 
 	// ADC_SCAN: Allow scanning.
-	ADC1->CTLR1 = ADC_SCAN;// (1<<26); // | (1<<26); // + Buffer
+	ADC1->CTLR1 = /*ADC_Pga_64 | */ADC_SCAN;
+
 
 	// Turn on DMA
 	RCC->AHBPCENR |= RCC_AHBPeriph_DMA1;
@@ -248,8 +248,8 @@ void InnerLoop()
 			printf( "%d,%d\n", j, shadowbuff[j] );
 #endif
 #ifdef QUADRATURE
-			int ti = i>>1;
-			int tq = q>>1;
+			int ti = i>>3;
+			int tq = q>>3;
 			int is = (ti*ti + tq*tq)>>8;
 #else
 			int is = i>>2;
@@ -295,8 +295,8 @@ int main()
 	SystemInit();
 
 	SysTick->CTLR = (1<<2) | 1; // HCLK
-
 	Delay_Ms(100);
+
 	printf( "System On\n" );
 
 	// x18; 8MHz x 18 = 144 MHz
@@ -304,6 +304,11 @@ int main()
 	RCC->CFGR0 &= ~RCC_PPRE1;
 	RCC->CFGR0 |= RCC_PLLMULL_0 | RCC_PLLMULL_1 | RCC_PLLMULL_2 | RCC_PLLMULL_3;
 
+	Delay_Ms(50);
+
+	// Disable HSI
+	RCC->CTLR &= ~(RCC_HSION);
+
 //	printf( "RCC: %08x\n", (RCC->CFGR0) );
 	RCC->AHBPCENR |= 3; //DMA2EN | DMA1EN
 	RCC->APB2PCENR |= RCC_APB2Periph_TIM1 | RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | 0x07; // Enable all GPIO